Integrated optical devices (i.e. photonic chip) for directly processing optical signals have become of greater importance as optical fiber communications increasingly replace metallic cable and microwave transmission links. Integrated optical devices can advantageously be implemented as silicon optical circuits having compact dimensions at relatively low cost. Silicon optical circuits employ integrated waveguide structures formed in a silicon layer of silicon-on-insulator (SOI) substrates, forming a silicon photonic chip.
In some applications, the optical signal is injected in/extracted from the photonic chip in a near perpendicular fashion, with respect to the photonic chip substrate plane, by way of grating couplers formed in the silicon photonic chip for input-output of the photonic signal. When using the silicon substrate in such a coupling fashion, such as when coupling to an optical fiber, the optical fiber is mounted in near perpendicular fashion.
During manufacture of integrated optical devices, a large number of integrated optical devices are fabricated on a typical semiconductor wafer. As part of a rigorous manufacturing process, it may be helpful to measure optical loss for quality control at the wafer level. Since optical loss in individual optical components is relatively low, testing for loss is typically performed on a special purposed test structure (i.e. the test structure will not be functional for the customer) comprising a plurality of optical components daisy chained together. During testing, a known/reference optical input is injected into the test structure and the optical output is measured, and compared with the known/reference optical input. One potential issue with testing individual devices at the wafer level is that optical inputs and outputs must be precisely aligned to accurately measure device loss. This may cause the testing process to be quite long and difficult.